Performance of Reduced DC Source Based Three-Phase High Resolution Multilevel Inverter with Optimal Asymmetry

Asymmetrical cascaded bridge multilevel converters use voltage sources of different magnitudes to generate higher number of levels. However, availability of sources of different ratings feeding the bridges is a limitation. This paper overcomes such limitation by utilizing the concept of capacitor voltage-balancing using Level Doubling Network (LDN) principle in space-vector plane. With the use of optimal asymmetry, presented topology can generate 43 levels at the output line voltage by using only 12 switches per phase. Hence, the most notable attribute of the presented topology is that it does not require isolated auxiliary power-supplies to develop such high-resolution output voltage. LDNs in this topology are self-balanced, and the auxiliary full-bridges require a closed loop controller to balance their dc-bus capacitor voltage. To validate the proposed concept, MATLAB simulations and experimental results are presented in this paper.

Faculty Associated

Prof. Sumit K Chattopadhyay

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